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26#define _B8_REG(addr) (*(volatile u32* )(uintptr_t)(addr))
27#define _B8_REG_U8(addr) (*(volatile u8* )(uintptr_t)(addr))
28#define _B8_REG_U16(addr) (*(volatile u16* )(uintptr_t)(addr))
31#define B8_FIFO_INT_VBLANK_ADDR (0xffffb000)
32#define B8_FIFO_INT_VBLANK_RX _B8_REG( B8_FIFO_INT_VBLANK_ADDR + 0 )
33#define B8_FIFO_INT_VBLANK_TX _B8_REG( B8_FIFO_INT_VBLANK_ADDR + 4 )
34#define B8_FIFO_INT_VBLANK_LEN _B8_REG( B8_FIFO_INT_VBLANK_ADDR + 8 )
35#define B8_FIFO_INT_VBLANK_CLEAR _B8_REG( B8_FIFO_INT_VBLANK_ADDR + 12 )
38#define B8_FIFO_SCI_ADDR (0xffffc000)
40#define B8_FIFO_SCI_TX(n) _B8_REG_U8( B8_FIFO_SCI_ADDR + 64*(n) + 32*0 + 4 )
41#define B8_FIFO_SCI_TX_LEN(n) _B8_REG_U8( B8_FIFO_SCI_ADDR + 64*(n) + 32*0 + 8 )
43#define B8_FIFO_SCI_RX(n) _B8_REG_U8( B8_FIFO_SCI_ADDR + 64*(n) + 32*1 + 0 )
44#define B8_FIFO_SCI_RX_LEN(n) _B8_REG_U16( B8_FIFO_SCI_ADDR + 64*(n) + 32*1 + 8 )
47#define B8_INF_ADDR (0xffff2000)
48#define B8_INF_CPUCLK _B8_REG( B8_INF_ADDR + 0x00 )
49#define B8_INF_CAL_L _B8_REG( B8_INF_ADDR + 0x10 )
50#define B8_INF_CAL_H _B8_REG( B8_INF_ADDR + 0x14 )
54#define B8_TMR_ADDR(n) (0xffff3000 + ((n)<<5))
55#define B8_TMR_CTRL(n) _B8_REG( B8_TMR_ADDR(n) + 0x0 )
57#define B8_TMR_MODE(n) _B8_REG( B8_TMR_ADDR(n) + 0x4 )
58#define B8_TMR_MODE_PERIODIC (0)
59#define B8_TMR_MODE_ONESHOT (1)
61#define B8_TMR_PER(n) _B8_REG( B8_TMR_ADDR(n) + 0x8 )
62#define B8_TMR_CNT(n) _B8_REG( B8_TMR_ADDR(n) + 0xc )